1. Field of the Disclosure
The present disclosure relates to circuits for nonvolatile memory cells, electronic devices including nonvolatile memory cells, and processes of forming the electronic devices.
2. Description of the Related Art
Many nonvolatile memory cells are programmed or erased using hot carrier injection (including conventional hot electron injection and source-side injection), Fowler-Nordheim tunneling, or both (e.g., program using hot electron injection and erase using Fowler-Nordheim tunneling). The nonvolatile memory cells can have transistor structures that significantly differ from transistor structures used in transistor-to-transistor logic, which are typically designed to operate at relatively high frequencies. For example, a nonvolatile memory cell may have a graded source region to reduce the likelihood of a junction breakdown between the graded source region and the substrate, a halo region to increase the electrical field near the drain region to improve programming efficiency, another suitable feature, or any combination thereof.
Those features may cause other consequences, particularly with respect to read operations. The graded source region typically occupies a larger area and results in a higher capacitance between the graded source region and the substrate, as compared to a source region of a logic transistor. The higher capacitance can slow the read operation. The halo region may be more likely to cause a read disturb problem with the nonvolatile memory cell than if a lightly-doped drain or an extension region were used instead of the halo region.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the invention.